Embedded Software IP & Technology Transfer in Power Electronics Applications

FPGA-based Motor Control and Embedded Motor Control Software IP – A review of 2013

Time passes and it is now the moment to make a short review of what happenned, in my opinion, in the world of FPGA-based Motor Control and Embedded Motor Control software IP in 2013:

New FPGA evaluation kits

Lattice has started the year with the release of its new iCE40 LP384 development kit. While not being explicitely targeted for motor control but controllers in general, this FPGA is small and very low cost: less than 50 cents per unit in multi-million unit quantities.  Even the evalutation kit is very low cost: both iCEblink40-HX1K Evaluation Kit and iCEblink40-LP1K Evaluation Kit are sold for 34.12$. Of course, those kits do not include any power stage, motor or transducers: you need to have your own.

A month later, Altera has annouced the release of its new Cyclone V SoC development kit. Built around a 800 MHz dual-core ARM Cortex-A9 processor and provided with all interfaces needed for maximum connectivity, this new device is clearly positionned in the same segment than Xilinx’s Zynq device (also built around ARM Cortex A9 dual-core processor) previously released in 2012. This kit interfaces with the FalconEye 2.0 motor control board.

Embedded Motor Control Software IP

In February, Texas Instrument (TI) has announced the release of their new INSTASpin-FOC sensorless motor control software. The pitch is “Identify, tune and fully control your motor in less than 5 minutes and eliminate the need for a mechanical rotor sensor” and meant to be used on TO C2000 Piccolo microcontrollers. According to TI, this helps saving months of design time which is inline with a topic previously addressed on this blog. To my knowledge, TI is currently the only motor control chip manufacturer offering such advanced motor control design tool. Note that this tool is meant to be used in sensorless applications, i.e. applications where near zero speed performance is not a requirement.

In October, my company Alizem has announced that our previously released Motor Control Software IP for Servo-Drives applications has reached a new level of performance on 100kW motors which has led into a licensing agreement with a major industrial OEM. At the same time, we have announced the signature of an agreement with the Canadian Space Agency regarding new motor control software technologies (stay tuned for the release shortly).

DesignNews Webinar

In May, I have had the pleasure of being invited to participate in a Webinar on the specific topic of FPGA-based motor control and sponsored by Altera.  The discussion has been held around the following questions:

• What are the typical steps and challenges faced by system designers when designing motion controllers?
• From a motion control design point of view, how do FPGA/SoC devices and design flows compares to other devices?
• Communication networks are clearly critical: What are some of the challenges of Industrial Ethernet?
• What design tools and flows are needed to maximize system designer productivity?
• What is needed from device providers to enable designers to go further in their product innovation?
• What factors can reduce the overall cost of ownership of motion control development platforms?
The webinar is still available for off-line consultation if you are interested.

 

Is there anything else missing ? If you think yes, please let me know ! You can also contact me on any topic you would like me to address. Thanks for reading my blog!

ISIE 2014 – Special Session on “Industrial Applications of FPGAs and Embedded Systems”

isie2014

 ISIE 2014 – IEEE International Symposium on Industrial Electronics

June 1-4, 2014, Istanbul, Turkey

Website: http://www.isie.boun.edu.tr

Call for papers: Special Session on Industrial Applications of FPGAs & Embedded Systems

The Special Session seeks papers describing original research or application aspects of FPGAs and Embedded Systems in the area of industrial electronics. Topics of interest include, but are not limited to:

– Design and test/debug methodologies for ES/SoC
– Architectures for ES
– Reconfigurable platforms
– Embedded software development
– Formal methods and ES design
– Industrial experiences
– Case studies

All the instructions for paper submission are included at the conference website: http://www.isie.boun.edu.tr/

Submission deadline (extended): 30 December 2013
It is possible to accommodate an extension of some extra days if authors contact organizers in advance. Special Session Organizers:

Luis Gomes (lugo@fct.unl.pt)
Juan J. Rodriguez-Andina (jjrdguez@uvigo.es)

EDA Tool in the cloud: A web-based IOPT Petri Net Editor

A few weeks ago, I have been pleased to attend IECON2013 in Vienna and had the chance to meet my friend Luis Gomes from the University Nova of Lisboa, Portugal. While discussing together, he took some time to give me some details about a web-based framework that he designed with his team. This framework is called “IOPT-Tools” and this is a on-line Petri Net editor. Petri nets are useful to modelize any type of process and are used in many different applications (e.g. workflow management or UAV fault diagnostics).

What’s cool about this tool (other than being web-based, i.e. not having to install it on your desktop computer) is that once your have modelized your system, you can run all sorts of analysis to validate system behavior and even automatically generate VHDL code or C code to embed your model inside a controller. Here is a screen shot of a model used for BLDC motor commutation:

ioptbldc

This tool in totally in line with current discussions in the EDA community regarding the migration of EDA tools in the cloud (see Cadence blog or Synopsis blog on this). EDA in the cloud in the idea of having tools for chip/embedded system design being offered as Software-As-a-Service (SaaS) and running on powerful servers so that even small teams could leverage important computing power they could not afford otherwise. With the rising complexity of chip design, it is well known that always more computing power is needed to compile designs and the solution won’t come from the standard computing solutions.

Congrats to the team of Dr. Gomes for their vision in developping this new tool ! You can access it and use it right now for FREE by following this link.

For more information regarding this tool, you can also consult some publications on the IEEE Explore. If somehow you use this tool and want to publish an article at the next IEEE IES IECON2014 conference in Dallas, TX, watch for the Call for Paper here.

IECON2013: Electronics System-on-Chip in Power Applications

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Are you registered for the next IECON2013 in Vienna ? It’s still time to plan your trip !

If you happen to be there, I invite you to attend the Technical Session on Electronic System-on-chip in Power Application that I will chair with Dr. Éric Monmasson. Here is the program:

TT04 1 – Electronics System-on-Chip in Power Applications

Room: D – 358 / 359 , Day: Wednesday 13th of November. Hour: 08:30, Duration: 120 minutes.  Chair/s: Eric Monmasson, Marc Perron.

Hour: 08:30

Title: Industrial Electronic Control: FPGAs and Embedded Systems Solutions
Authors:
Prof. Luis Gomes, Univ. Nova Lisboa, Portugal
Prof. Eric Monmasson, University of Cergy-Pontoise, France
Prof. Marcian Cirstea, Anglia Ruskin University, United Kingdom
Prof. Juan J. Rodriguez-Andina, Universidad Vigo, Spain

Hour: 08:50
Title: Real-Time Embedded Control for Point-On-Wave Switching
Authors:
Dr. Anton Poeltl, Abb, USA

Hour: 09:10
Title: Medium Voltage 6-pulse Current Source Rectifier with a Novel Shunt Active Power Filter Connection
Authors:
Dr. Mostafa Hamad, Arab academy for science and technology, Egypt
Dr. Mahmoud Masoud, Sultan Qaboos University, Oman
Dr. Khaled Ahmed, University of Aberdeen, United Kingdom
Prof. Barry Williams, University of Strathclyde, United Kingdom

Hour: 09:30
Title: Rapid Prototyping Framework for Real-Time Control of Power Electronic Converters Using Simulink
Authors:
Mr. Bruno dos Santos, Faculty of Engineering, University of Porto, Portugal
Prof. Rui Esteves Araújo, Faculty of Engineering, University of Porto, Portugal
Mr. Diogo Varajão, Faculty of Engineering, University of Porto, Portugal
Mr. Cláudio Pinto, Faculty of Engineering, University of Porto, Portugal

Hour: 09:50
Title: Comparative of HLS and HDL Implementations of a Grid Synchronization Algorithm.
Authors:
Mr. Fco. Manuel Sánchez, Alcalá University, Spain
Dr. Raúl Mateos, Alcalá University, Spain
Dr. Emilio J. Bueno, Alcalá University, Spain
Mr. Javier Mingo, Alcalá University, Spain
Mrs. Inés Sanz, Alcalá University, Spain

Hour: 10:10
Title: Sliding Mode Direct Power Control of three-phase PWM boost rectifier using a single DC current sensor
Authors:
Ms. Marwa Ben Said-Romdhane, Enit, Tunisia
Dr. Mohamed Wissem Naouar, Enit, Tunisia
Prof. Ilhem Slama-Belkhodja, Enit, Tunisia
Prof. Eric Monmasson, Université de Cergy Pontoise, Tunisia

If you plan to be there and want us to meet, just send me a note ! See you there !

FPGA-based Motor Control: “The Brains behind the Motion Controller” Webinar

design_newsaltera_may30

I will be giving a webinar on the topic of FPGA-based Motor Control on May 30th 2013. Make sure to register by click this link.

Meanwhile, if you have any particular question you would like to be addressed during the Q&A session, feel free to contact me.

I look forward to talk with you on May 30th !

NOTE (June 3rd 2013): You can now here the webinar archive by clicking here.

Why developing power electronics embedded software is so hard ?

Here is a figure I did use in a recent presentation explaining why power electronics software is so hard to develop:

Hence, in order to create quality embedded software for power electronics applications, one must have advanced knowledge on :

  • the load (motor type, dynamics, etc),
  • the electrical source (topology of the power converter, devices technologies, etc.),
  • the electronics, i.e. the device on which the software is going to run and also transducers that are going to interface with the device and the system,
  • and embedded software development, of course.
Each of those topic is in itself a speciality and represent very different branches and cultures of electrical engineering (EE), i.e. ‘power’ vs ‘software’. Those cultures are so different that the following situation arises:
  • the ‘power engineer’ doesn’t know about software development and often minimize its importance (this most of the time leads to bad software development practices which makes the situation worse),
  • the ‘software engineer’ doesn’t know about power applications since this is way out of his traditionnal type of applications (web, internet, applicative) and neglect to consider that he is working with energy (i.e.  error is not leading to a blue screen but to a damaged system or to personel injury).
In a recent interview, I made an analogy with this situation naming embedded software for power electronics applications as the triathlon of electrical engineering. The best triathlete is not the perfect swimmer, the perfect cyclist or the perfect runner: he is the best at maximizing performance in those three sports.
It is the same with embedded software for power electronics applications and this is why it is so hard.

IEEE Industrial Electronics Society launches its TechNews (ITeN)

I am now a proud member of the editorial committee of the new IEEE IES ITeN :

The IE Technology News (ITeN) is a step forward to widen the reach of the IES by a free on-line publication. This provides the extended abstracts of a few timely, thought provoking articles from IES transactions, magazine and conference proceedings periodically. In addition, it also aims to report important society news, announcement and summaries of IES-conferences, brief outline of interesting tutorials (from IES-conferences) and promote activities of Technical Committees.  ITeN is supported by an editorial board with domain-experts from academia and industries and Technical Committees (through Chairs and Vice-Chairs) of IES.”

Click here to access ITeN on IES website.

Who can nominate a Paper to ITeN?

  • ALL Associate Editors of ITeN. This is the main job of AEs. They will check a potential paper (from TIE, TII, IEM and all IES sponsored conferences) in their areas and nominate a good one to the EIC,
  • Advisors, all past officers, all major award winners of IES, all AEs of TIE, TII and IEM
  • All General Chairs, Technical Program Chairs, Technical Track Chairs, SS Chairs and SS Organizers can nominate a conference paper
  • Self-nomination is not allowed.

You would like to submit a paper to ITeN ? Please let me know !

 

FPGA-based Motor Control and Motor Control Software IP – A review of 2012

Here is my review of the main events that have happened in 2012 in the world of FPGA-based motor control and Motor Control Software IP.

A new kit from Microsemi and Trinamic

In February, Microsemi and Trinamic did release their new Motor Control Software development kit. This new kit combines three features crucial for successful implementation of complex motor control algorithms: an embedded microcontroller, programmable analog fabric, and programmable digital (FPGA) fabric. This kit is built around Microsemi’s SmartFusion chip and embedded ARM Cortex M-3 processor. It is bundled with stepper motor and BLDC motor. Here’s the video that’s been presented at DesignWest 2012. Of course, one key feature of Microsemi is their analog part that can be used for motor sensing leading to reductions of  overall system complexity and operational costs.

Microsemi did also release its new SmartFusion2 in october mentionning they are already have engagement from customer building critical systems in a broad range of applications including flight data recorders, weapons systems, defibrillators, handheld radios, communications management systems and industrial motor control.

On Altera, Xilinx and Lattice side

No new kit have been released from Xilinx and Altera this year, only one from Lattice. Actually, this kit is not intended for “motor control” specifically but rather for “complex system control” in general and also “video interface design”. According to the previous article, the kit offers a wealth of other built-in system resources that engineers can use to build realistic system prototypes with both digital and analog control‚ human interfaces (electret microphone‚ speaker/headphone‚ LED) and a wide variety of interfaces to external devices and systems (USB 2.0‚ microSD‚ GPIO).

In October, Xilinx did release a new PWM IP that specically releverage FPGA properties to reduce the level of noise compared to standard PWM. This is particularly refreshing to see this since advanced PWM is certainly a domain where FPGA can have and advantage compared to more conventionnal devices since it involves complex calculations at high speed. This is something I did mention in my “Electric motor power savings: The true impact of the device selection” post.

Altera did release its new framework in November 2012 at SPS/IPS Drives conference that is a design environment that help motor control system designer to leverage the different Altera EDA tools in its FPGA-based motor control design process. This framework contains a “drive-on-a-chip” reference design that can be used with the EBV kit or the INK kit.

 

New Motor Control IP for Altera FPGAs from Alizem

After having released its new on-line boutique in October, Alizem did release its new off-the-shelf motor control software IP for Altera FPGAs. This new software has been tested on real motors from 30W to 86kW and includes many debugging functions for the power stage, the transducers and system protection that helps the motor control system designer in developping new systems safer, cheaper and faster. This new motor control software IP has received AMPP certification in december.

This product is completely in-line with my presentation at IECON2012 on the topic of “FPGA-based Custom Motor Drives Design: The Role of 3rd-party System-Level IP“.

What to expect in 2013 ?

With increased market pressure for lower costs and more innovations, the field of custom motor drives is expected to be more in demand in 2013 and the coming years. According to this market reserach, custom design and manufacturing of an inverter’s sub-unit is driving the modular approach accross applications. According to the same study, major changes are happenning accross the supply chain because power electronics often requires having several types of knowledge and experience gained know-how in mechanics, electronics, semiconductors, electrics, fluidics and hydraulics, and connectors and its development can be complicated and final products expensive.

 Is there anything missing ?

Please let me know by sending me a message via Twitter. You can also contact me on any question you would like me to address on the field of FPGA-based motor control and motor control software IP.

Thanks for reading my blog, I hope you find it useful.

IP for FPGAs: What Does the Future Hold?

Warren Miller has recently posted a series of articles on All Programmable Planet website titled “IP for FPGAs: What Does the Future Hold ?”. I took time to add my two-cents in the conversation:

“Hi Warren and congrats for this excellent series of post.

I completely agree with the idea of having IP blocks that include not only the desired function, but also a bundle of verification functions that help designers to reach their ultimate goal: having a fully working system on time and within budget.

In my area of expertise – motor control software IP – this is particularly important since the application is the management of energy and if an error occurs, this can lead to important system damage (i.e. burn a motor / power stage). Not just a simple “system reboot”.

However, the design of such verification function is a field of expertise in itself that’s entirely related to the expertise domain (i.e. motor control, this is true also for other complex applications such as image processing). Also, the translation of those functions into a form that’s usable by a third-party (which can be internal or external) has also a cost (testing, documentation, etc.).

This is true for DSP/MCU-based design which are only SW configurable devices. Hence, for FPGA-based designs, which have an order of complexity higher than DSP/MCU based design (because of the programmability of the HW), it is obvious that it is also true.

I think the fullfillement of those needs belong to 3rd party system-level IP providers (such as Alizem in the field of motor control), i.e. who package their domain expertise in the form of a licensable IP products.

This is exactly the topic I have presented last month at the IEEE Industrial Electronics Society (IES) Annual meeting for which I have been invited speaker of the Industry Forum. You can access my presentation on my blog:

FPGA-based Custom Motor Drives Design: The Role of 3rd-party System-Level IP

The conclusion of this presentation is: the role of 3rd-party system-level IP providers is to provide products that makes it so easy to the system designers that they can bring their own system to the next level (i.e. focus on their true product differentiation).

Just like Google did with its “self-driving” car.

Best Regards, Marc.”

FPGA-based Custom Motor Drives Design: The Role of 3rd-party System-Level IP

For those who didn’t have the chance to be at the annual IEEE Industrial Electronics Conference (IECON) 2012 conference in Montréal, Qc last week, you may have a look at the slides of my presentation :

I take this opportunity to thank the organizers of the Industry Forum – Michael Condry and Richard Grisel  – for their kind invitation to participate at this conference.